The present invention relates to two-terminal clamping devices for clamping the voltage level at one terminal with respect to another terminal. More particularly, the invention relates to a monolithic symmetrical clamping circuit for providing shunt clamping whenever the voltage level at either terminal exceeds the voltage level at the other terminal by a predetermined amount. Specifically, the symmetrical clamp conducts at approximately .+-.2 diode voltage drops thereacross.
There are a myriad of clamping circuits in the prior art which are used to clamp a voltage appearing at one node with respect to a reference node. For instance, many NPN monolithic differential amplifier stage front ends require clamping in order to prevent long term damage to the NPN devices due to emitter-base junction voltages being applied thereto which are near or even exceed the breakdown characteristics of the junction during normal operation thereof. A good example of such a problem is the LM 311 Voltage Comparator Circuit, manufactured by Motorola, Inc. among others. To protect the base-emitter junctions of the NPN differential amplifier, the LM 311 includes a pair of series connected back-to-back Zener Diodes coupled across inputs of the NPN differential stage. This Zener diode clamp circuit clamps the voltage thereacross to approximately five or six volts. Although this prior art clamp circuit prevents breakdown of the base-emitter junctions of the NPN devices it does allow a significant reverse bias voltage to be applied thereto. In long term operation the junction of the NPN devices may be continually stressed which may cause damage to the stage and/or shifts in the V.sub.be of the devices. This is not desirable.
Additionally, the prior art clamp, when rendered conductive, shunts current from the higher voltage node to the lower referenced voltage node which can cause undesirable loading at the latter node of the differential stage.
Hence, there is a need for a simple, inexpensive two-terminal clamping circuit which operates to clamp the voltage across the two terminals to a much lower value than some prior art to prevent long term stresses on NPN differential stages while preventing loading to the lower voltage referenced terminal.